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Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection [Article]

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dc.contributor.author James, Alex Pappachen
dc.contributor.author Smagulova, Kamilya
dc.contributor.author Irmanova, Aidana
dc.date.accessioned 2019-09-26T06:33:48Z
dc.date.available 2019-09-26T06:33:48Z
dc.date.issued 2018-11-15
dc.identifier.citation Smagulova, K., Irmanova, A., & James, A. P. (2018). Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection. In 2018 International SoC Design Conference (ISOCC). IEEE. https://doi.org/10.1109/isocc.2018.8649972 en_US
dc.identifier.issn 2163-9612
dc.identifier.other 10.1109/ISOCC.2018.8649972
dc.identifier.uri http://nur.nu.edu.kz/handle/123456789/4260
dc.description https://ieeexplore.ieee.org/document/8649972 en_US
dc.description.abstract In this paper, we propose XOR based memristive edge detector circuit that is integrated into a near sensor log-linear CMOS pixel. Memristor threshold logic was used to design NAND gates, which serve as a building block for XOR gates. For validation of proposed circuit functionality hardware simulation of logic gates with a pixel pair was conducted using TSMC 0.18um technology and system-level simulation of the proposed circuit using SPICE models. The proposed method operates in low power and takes a small area on chip. The power consumption of one pixel is 1.16uW and total area 36.72 um 2 without photosensing component. The power consumption of NAND circuit is 1.11pW and total area 32.4um 2 . en_US
dc.language.iso en en_US
dc.publisher Institute of Electrical and Electronics Engineers en_US
dc.rights Attribution-NonCommercial-ShareAlike 3.0 United States *
dc.rights.uri http://creativecommons.org/licenses/by-nc-sa/3.0/us/ *
dc.subject Low Power en_US
dc.subject Research Subject Categories::TECHNOLOGY en_US
dc.subject CMOS pixel en_US
dc.subject Memristive Edge Detection en_US
dc.title Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection [Article] en_US
dc.type Article en_US
workflow.import.source science


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