Memristor-based Synaptic Sampling Machines [Article]

dc.contributor.authorDolzhikova, Irina
dc.contributor.authorSalama, Khaled
dc.contributor.authorKizheppatt, Vipin
dc.contributor.authorJames, Alex Pappachen
dc.date.accessioned2019-11-05T06:43:03Z
dc.date.available2019-11-05T06:43:03Z
dc.date.issued2018-08
dc.descriptionhttps://arxiv.org/ftp/arxiv/papers/1808/1808.00679.pdfen_US
dc.description.abstractSynaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS crossbar structure with the synaptic sampling cell (SSC) being used as a basic stochastic unit. The increase in the edge computing devices in the Internet of things era, drives the need for hardware acceleration for data processing and computing. The computational considerations of the processing speed and possibility for the real-time realization pushes the synaptic sampling algorithm that demonstrated promising results on software for hardware implementation.en_US
dc.identifier.citationDolzhikova, I., Salama, K., Kizheppatt, V., James, A., & Machines, A. S. S. (n.d.). Memristor-based Synaptic Sampling Machines.en_US
dc.identifier.urihttp://nur.nu.edu.kz/handle/123456789/4290
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.rightsAttribution-NonCommercial-ShareAlike 3.0 United States*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0/us/*
dc.subjectsynaptic sampling cellen_US
dc.subjectSSCen_US
dc.subjectSSMen_US
dc.subjectSynaptic Sampling Machineen_US
dc.subjectmemristive-CMOSen_US
dc.titleMemristor-based Synaptic Sampling Machines [Article]en_US
dc.typeArticleen_US
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