Discrete-level memristive circuits for HTM-based spatiotemporal data classification system

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dc.contributor.authorJames, Alex Pappachen
dc.contributor.authorIbrayev, Timur
dc.contributor.authorIrmanova, Aidana
dc.date.accessioned2025-08-18T11:58:37Z
dc.date.available2025-08-18T11:58:37Z
dc.date.issued2017
dc.description.abstractThe authors propose a discrete-level memristive memory design for analogue data processing in hardware implementations of hierarchical temporal memory (HTM). Memristors operate in ternary and quaternary states via sub-cell resistive networks. Integration into HTM temporal memory improves face and speech recognition accuracy.en
dc.identifier.citationIrmanova, Aidana; Ibrayev, Timur; James, Alex Pappachen (2017). Discrete-level memristive circuits for HTM-based spatiotemporal data classification system. IET Cyber-Physical Systems: Theory & Applications, 3(1), 34–43. DOI: 10.1049/iet-cps.2017.0053en
dc.identifier.doi10.1049/iet-cps.2017.0053
dc.identifier.otherFilename:10.1049_IET-CPS.2017.0053.pdf
dc.identifier.urihttps://doi.org/10.1049/iet-cps.2017.0053
dc.identifier.urihttps://nur.nu.edu.kz/handle/123456789/9290
dc.language.isoen
dc.publisherInstitution of Engineering and Technology (IET)
dc.relation.ispartofIET Cyber-Physical Systems: Theory & Applicationsen
dc.rightsRestricted accessen
dc.sourceIET Cyber-Physical Systems: Theory & Applications, 3(1), 34–43, (2017)en
dc.subjectpattern recognitionen
dc.subjectanalog hardwareen
dc.subjectdiscrete-level memoryen
dc.subjectspatiotemporal data classificationen
dc.subjecthierarchical temporal memory (HTM)en
dc.subjectmemristive circuitsen
dc.subjectmemristive circuitsen
dc.titleDiscrete-level memristive circuits for HTM-based spatiotemporal data classification systemen
dc.typeJournal Articleen

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