A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits
| dc.contributor.author | Ibrayev, Timur | |
| dc.contributor.author | James, Alex Pappachen | |
| dc.contributor.author | Merkel, Cory | |
| dc.contributor.author | Kudithipudi, Dhireesha | |
| dc.date.accessioned | 2017-01-04T05:59:51Z | |
| dc.date.available | 2017-01-04T05:59:51Z | |
| dc.date.issued | 2016-07-29 | |
| dc.description.abstract | Hierarchical Temporal Memory (HTM) is a machine learning algorithm that is inspired from the working principles of the neocortex, capable of learning, inference, and prediction for bit-encoded inputs. Spatial pooler is an integral part of HTM that is capable of learning and classifying visual data such as objects in images. | ru_RU |
| dc.identifier.citation | Ibrayev, T., James, A. P., Merkel, C., & Kudithipudi, D. (2016). A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems. (Vol. 2016-July, pp. 1254-1257). [7527475] Institute of Electrical and Electronics Engineers Inc.. DOI: 10.1109/ISCAS.2016.7527475 | ru_RU |
| dc.identifier.uri | http://nur.nu.edu.kz/handle/123456789/2108 | |
| dc.language.iso | en | ru_RU |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | ru_RU |
| dc.rights | Attribution-NonCommercial-ShareAlike 3.0 United States | * |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-sa/3.0/us/ | * |
| dc.subject | feature extraction | ru_RU |
| dc.subject | Hierarchical Temporal Memory | ru_RU |
| dc.subject | machine learning | ru_RU |
| dc.subject | memristor | ru_RU |
| dc.subject | neuromorphic design | ru_RU |
| dc.subject | pattern recognition | ru_RU |
| dc.subject | Research Subject Categories::TECHNOLOGY::Engineering physics | ru_RU |
| dc.title | A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits | ru_RU |
| dc.type | Article | ru_RU |