Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection [Article]

dc.contributor.authorJames, Alex Pappachen
dc.contributor.authorSmagulova, Kamilya
dc.contributor.authorIrmanova, Aidana
dc.date.accessioned2019-09-26T06:33:48Z
dc.date.available2019-09-26T06:33:48Z
dc.date.issued2018-11-15
dc.descriptionhttps://ieeexplore.ieee.org/document/8649972en_US
dc.description.abstractIn this paper, we propose XOR based memristive edge detector circuit that is integrated into a near sensor log-linear CMOS pixel. Memristor threshold logic was used to design NAND gates, which serve as a building block for XOR gates. For validation of proposed circuit functionality hardware simulation of logic gates with a pixel pair was conducted using TSMC 0.18um technology and system-level simulation of the proposed circuit using SPICE models. The proposed method operates in low power and takes a small area on chip. The power consumption of one pixel is 1.16uW and total area 36.72 um 2 without photosensing component. The power consumption of NAND circuit is 1.11pW and total area 32.4um 2 .en_US
dc.identifier.citationSmagulova, K., Irmanova, A., & James, A. P. (2018). Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection. In 2018 International SoC Design Conference (ISOCC). IEEE. https://doi.org/10.1109/isocc.2018.8649972en_US
dc.identifier.issn2163-9612
dc.identifier.other10.1109/ISOCC.2018.8649972
dc.identifier.urihttp://nur.nu.edu.kz/handle/123456789/4260
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US
dc.rightsAttribution-NonCommercial-ShareAlike 3.0 United States*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0/us/*
dc.subjectLow Poweren_US
dc.subjectResearch Subject Categories::TECHNOLOGYen_US
dc.subjectCMOS pixelen_US
dc.subjectMemristive Edge Detectionen_US
dc.titleLow Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection [Article]en_US
dc.typeArticleen_US
workflow.import.sourcescience

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