DEVELOPMENT OF SILICON PHOTONICS BASED MEMORY SOLUTIONS

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dc.contributor.authorOtynshy, Dinmukhammedali
dc.date.accessioned2022-09-16T09:14:20Z
dc.date.available2022-09-16T09:14:20Z
dc.date.issued2022-04
dc.description.abstractElectronic-based computing and information processing has witnessed an ever-increasing development since the first invention of the Integrated Circuit (IC) in the middle of the 20th century. However, the problems related to quantum tunneling, reduced depletion layer, increased leakage current, and thermal effects are indicators that Moor’s law is nearing its end. Silicon Photonics has already become the potential solution and the most promising candidate for high-speed computing and information processing. In recent years, several different devices have been developed in the Silicon Photonics field to generate, sense, estimate, and manage optical signals. These devices include Mach–Zehnder interferometer for phase shift determining, Fabry–Pérot and Gires–Tournois interferometers made from two parallel refractive surfaces, and photonic crystal structures with periodically changed refractive index, etc. However, the most possible favorite is the micro-ring resonator due to its high refractive index value and unlimited possibilities of modification for specific purposes (for example, using slot waveguides from different materials, SWG for decreasing diffraction effects, multiple ring resonator structures, etc.). The constructed memory bank consists of several SR latches, which utilize two micro-ring resonators each for managing the optical light signals. Ring modulation is realized by using forward bias voltage on the silicon waveguide with a pn-junction structure, although another method is also considered for comparison reasons. Simulation results of the optical transmission power at particular output ports of the micro-ring resonator are compared to quantitative mathematical analysis. A feedback loop, which pushes the output signal into input one, is implemented with help of a germanium photodetector. The simulation results of the on-chip 40 um long detector give zero-bias responsivity of 0.67 A/W, as well as 23 GHz minimum bandwidth. Both NAND and NOR logic gates based SR-latches showed an operational speed that exceeds the 25 Gbps data rate. Keywords: silicon photonics, micro-ring resonator, optical logic gates, PIC memory unit, on-chip photodetector, optical SR latch.en_US
dc.identifier.citationOtynshy, D. (2022). DEVELOPMENT OF SILICON PHOTONICS BASED MEMORY SOLUTIONS (Unpublished master's thesis). Nazarbayev University, Nur-Sultan, Kazakhstanen_US
dc.identifier.urihttp://nur.nu.edu.kz/handle/123456789/6710
dc.language.isoenen_US
dc.publisherNazarbayev University School of Engineering and Digital Sciencesen_US
dc.rightsAttribution-NonCommercial-ShareAlike 3.0 United States*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/3.0/us/*
dc.subjectType of access: Gated Accessen_US
dc.subjectResearch Subject Categories::TECHNOLOGYen_US
dc.subjectsilicon photonicsen_US
dc.subjectmicro-ring resonatoren_US
dc.subjectoptical logic gatesen_US
dc.subjectPIC memory uniten_US
dc.subjecton-chip photodetectoren_US
dc.subjectoptical SR latchen_US
dc.titleDEVELOPMENT OF SILICON PHOTONICS BASED MEMORY SOLUTIONSen_US
dc.typeMaster's thesisen_US
workflow.import.sourcescience

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