01. PhD Thesis

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Browsing 01. PhD Thesis by Subject "AI"

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    MEMRISTIVE ANALOG MEMORY FOR DEEP NEURAL NETWORK ARCHITECTURES
    (Nazarbayev University School of Engineering and Digital Sciences, 2022-03-04) Irmanova, Aidana
    Analog switching memristive devices can be used as part of the acceleration block of Neural Network circuits or the part of the building block of neuromorphic architectures at the edge solutions. Ideally, memristive devices are nanoscale, low-power resistive devices that can store an analog continuum of resistive levels with a predictable and stable mechanism of switching. Practically, memristors can be fabricated at the nano-scale, and operate at low power, however, the current state of the art of memristor technology hinders the widespread adoption of memristive neuromorphic circuits due to the system level and device level issues. The device-level issues include the variability aspects of the switching mechanism and endurance-related limitations. As analog resistive switching is a fragile process, memristors are prone to early aging, precision loss, and variability or errors. System-level issues include the design of the architecture of Neural Network as well as training schemes for fast convergence with the given limitations of the hardware resources. The memory resources are limited by the quantized analog levels of memristors. In this work, the memristors are used to build an analog memory for deep neural network architectures. For efficient use of memristive devices in neuromorphic circuits, it is required to control the resistive switching process of memristors. Controlling resistive switching enables both off and on-chip training prospects of neural network optimization. In addition, the controlling resistive switching process can be used to spot the malfunctions in the stack of memristor arrays. Such detection methods, on and off-chip training issues as well as quantizing the analog levels of memristive states are discussed in this work.
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    RECEIVER ARCHITECTURES AND ALGORITHMS FOR NON-ORTHOGONAL MULTIPLE ACCESS
    (Nazarbayev University School of Engineering and Digital Sciences, 2020-05) Manglayev, Talgat
    Multiple access (MA) schemes in cellular systems aim to provide high throughput to multiple users simultaneously while utilising the network resources efficiently. Traditionally, each user in the network is assigned a fraction of resources (such as slots in time or frequency) to operate so that multi-user interference is avoided. These schemes are named as ‘orthogonal multiple access’ (OMA) and are the basis of most cellular standards – from the earliest first generation up to the current fourth-generation systems. Non-orthogonal multiple access (NOMA) on the other hand is a novel method that allows all the users in the network to operate in the entire available spectrum at the same time which enables significant improvement in the system throughput. While providing increased throughput, NOMA requires high computational power in order to implement sophisticated interference cancellation algorithms at each user terminal, as well as power allocation schemes at the base station. As a potential candidate for the fifth-generation networks (5G), NOMA must meet certain requirements, and computational efficiency is essential for reduced latency. Recently graphics processing units (GPUs), which were initially intended for outputting images to display, appeared as an alternative to multi-core central processing units (CPUs) for general-purpose computing. GPUs have thousands of cores with approximately three times less frequency than a CPU core. With their numerous advantages in executing heavy and time-consuming computations in parallel, GPUs have become attractive platforms in a variety of fields. The overall aim of this research is to significantly increase the scientific understanding and technical knowledge on NOMA. This is achieved by exploring and developing novel methods, models, designs and techniques that will facilitate the implementation of NOMA for future generation networks. First, the achievable data rates for individual users are demonstrated in a successful interference cancellation (SIC) based NOMA network. These results were compared against the conventional orthogonal MA schemes with optimum power allocation and varying fairness. In addition, a further investigation was carried out into the deficiency of SIC receivers which can occur when a user in the networks attempts to decode other users’ signal. Presented in the analysis is the findings from the experimental process where the decoding order of a user with a mismatched signal was observed as well as the significant impact on the computation time. The decoding time-difference between correct and mismatched decoding order as a detection method of deficiency or fraudulence in the network is then discussed. Next, a comparison is presented between the computational times of the SIC receiver with another popular interference cancellation scheme named ‘parallel interference cancellation’ (PIC). This was done using different platforms specifically for an uplink NOMA system. The results showed that the computation time of PIC scheme is significantly lower than SIC on the GPU platform even for a very large number of available users in the network. Then, the execution time of NOMA with SIC in the uplink of a cellular network with user clustering was examined. User clustering is a popular method in NOMA networks that eases the sophisticated resource allocation and network management issues. While most works found in the literature review concentrate on the joint optimisation of user grouping and resources, this research project focused on processing the signal detection of each cluster in parallel on the GPU platform at the base station. Following this, parallel interference cancellation (PIC) was implemented and compared with the existing SIC on both CPU and GPU platforms for uplink NOMAOFDM. Architectures of the receivers were modified to fit into parallel processing. GPU was found applicable to speed up computations in NOMA based next-generation cellular networks outperforming up to 220 times SIC on CPU. Finally, the research presents the power allocation problem from artificial intelligence (AI) perspective and propose a method to predict the power allocation coefficients in a downlink NOMA system. The results of the research show a close-to-optimal sum rate with about 120 times reduced computation time. The achieved results decreases the network latency and assist NOMA to meet 5G requirements.