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Browsing Articles by Author "dcff4663-5cb6-492f-ba55-5f0c57fad89d"

Now showing items 1-8 of 8

Feature extraction without learning in an analog Spatial Pooler memristive-CMOS circuit design of Hierarchical Temporal Memory [Article]

Krestinskaya, Olga; James, Alex Pappachen (Springer US, 2018-03-14)

Hierarchical temporal memory (HTM) is a neuromorphic algorithm that emulates sparsity, hierarchy and modularity resembling the working principles of neocortex. Feature encoding is an important step to create sparse binary ...
Hierarchical Temporal Memory using Memristor Networks: A Survey

Krestinskaya, Olga; Dolzhikova, Irina; James, Alex Pappachen (Institute of Electrical and Electronics Engineers, 2018-09-24)

This paper presents a survey of the currently available hardware designs for implementation of the human cortex inspired algorithm, Hierarchical Temporal Memory (HTM). In this review, we focus on the state of the art ...
Image Based HTM Word Recognizer for Language processing [Article]

James, Alex Pappachen; Irmanova, Aidana; Krestinskaya, Olga (Institute of Electrical and Electronics Engineers, 2019-11-29)

The hardware implementation of neuro-inspired machine learning algorithms for near sensor processing on edge devices is an open problem. In this work, we propose a solution to written word recognition problem related to ...
Impact of Integrated Circuit Packaging on Synaptic Dynamics of Memristive Devices [Article]

Irmanova, Aidana; Ellis, G. A.; James, Alex Pappachen (Institute of Electrical and Electronics Engineers, 2018-09-27)

The memristor can be used as non volatile memory (NVM) and for emulating neuron behavior. It has the ability to switch between low resistance R on and high resistance values R off, and exhibit the synaptic dynamic behaviour ...
Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection [Article]

James, Alex Pappachen; Smagulova, Kamilya; Irmanova, Aidana (Institute of Electrical and Electronics Engineers, 2018-11-15)

In this paper, we propose XOR based memristive edge detector circuit that is integrated into a near sensor log-linear CMOS pixel. Memristor threshold logic was used to design NAND gates, which serve as a building block for ...
Memristor-based Synaptic Sampling Machines [Article]

Dolzhikova, Irina; Salama, Khaled; Kizheppatt, Vipin; James, Alex Pappachen (Institute of Electrical and Electronics Engineers, 2018-08)

Synaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS ...
Neuron inspired data encoding memristive multi-level memory cell

Irmanova, Aidana; James, Alex Pappachen (Springer Nature, 2018-03-14)

Mapping neuro-inspired algorithms to sensor backplanes of on-chip hardware require shifting the signal processing from digital to the analog domain, demanding memory technologies beyond conventional CMOS binary storage ...
Wireless Charging Techniques for UAVs: A Review, Reconceptualization, and Extension

Lu, Maxim; Bagheri, Mehdi; James, Alex Pappachen; Phung, Toan (IEEE Access, 2018-05-28)

An important application in the growing field of unmanned aerial vehicles (UAVs) is in monitoring and inspection of high voltage power lines and electrical networks. The UAV-based monitoring method will save energy, simplify ...