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Memristor-based Synaptic Sampling Machines [Article]

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dc.contributor.author Dolzhikova, Irina
dc.contributor.author Salama, Khaled
dc.contributor.author Kizheppatt, Vipin
dc.contributor.author James, Alex Pappachen
dc.date.accessioned 2019-11-05T06:43:03Z
dc.date.available 2019-11-05T06:43:03Z
dc.date.issued 2018-08
dc.identifier.citation Dolzhikova, I., Salama, K., Kizheppatt, V., James, A., & Machines, A. S. S. (n.d.). Memristor-based Synaptic Sampling Machines. en_US
dc.identifier.uri http://nur.nu.edu.kz/handle/123456789/4290
dc.description https://arxiv.org/ftp/arxiv/papers/1808/1808.00679.pdf en_US
dc.description.abstract Synaptic Sampling Machine (SSM) is a type of neural network model that considers biological unreliability of the synapses. We propose the circuit design of the SSM neural network which is realized through the memristive-CMOS crossbar structure with the synaptic sampling cell (SSC) being used as a basic stochastic unit. The increase in the edge computing devices in the Internet of things era, drives the need for hardware acceleration for data processing and computing. The computational considerations of the processing speed and possibility for the real-time realization pushes the synaptic sampling algorithm that demonstrated promising results on software for hardware implementation. en_US
dc.language.iso en en_US
dc.publisher Institute of Electrical and Electronics Engineers en_US
dc.rights Attribution-NonCommercial-ShareAlike 3.0 United States *
dc.rights.uri http://creativecommons.org/licenses/by-nc-sa/3.0/us/ *
dc.subject synaptic sampling cell en_US
dc.subject SSC en_US
dc.subject SSM en_US
dc.subject Synaptic Sampling Machine en_US
dc.subject memristive-CMOS en_US
dc.title Memristor-based Synaptic Sampling Machines [Article] en_US
dc.type Article en_US
workflow.import.source science


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